NDLI: Substrate noise generation in complex digital systems: efficient modeling and simulation methodology and experimental verification

Content Provider	IEEE Xplore Digital Library
Author	van Heijningen, M. Badaroglu, M. Donnay, S. Gielen, G.G.E. De Man, H.J.
Copyright Year	1966
Abstract	More and more system-on-chip designs require the integration of analog circuits on large digital chips and will therefore suffer from substrate noise coupling. To investigate the impact of substrate noise on analog circuits, information is needed about digital substrate noise generation. In this paper, a recently proposed simulation methodology to estimate the time-domain waveform of the substrate noise is applied to an 86-Kgate CMOS ASIC on a low-ohmic epi-type substrate. These simulation results have been compared with substrate noise measurements on this ASIC and the difference between the simulated and measured substrate noise rms voltage is less than 10%. The simulated time domain waveform and frequency spectrum of the substrate noise correspond well with the measurements, indicating the validity of this simulation methodology. Both measurements and simulations have been used to analyze the substrate noise generation in more detail. It has been found that direct noise coupling from the on-chip power supply to the substrate dominates the substrate noise generation and that more than 80% of the substrate noise is generated by simultaneous switching of the core cells. By varying the parameters of the simulation model, it has been concluded that a flip-chip packaging technique can reduce the substrate noise rms voltage by two orders of magnitude when compared to traditional wirebonding.
Sponsorship	IEEE Solid-State Circuits Society IEEE Electron Devices Society IEEE Circuits and Systems Society Japan Society of Applied Physics (JSAP) IEEE Microwave Theory and Techniques Society IEEE San Francisco Section Bay Area Council Univ. PA IEEE
Starting Page	1065
Ending Page	1072
Page Count	8
File Size	303932
File Format	PDF
ISSN	00189200
Volume Number	37
Issue Number	8
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2002-08-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Noise generators Digital systems Circuit noise Noise measurement Circuit simulation Analog circuits Application specific integrated circuits Voltage Power generation System-on-a-chip
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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