NDLI: Sub-50 nm P-channel FinFET

Content Provider	IEEE Xplore Digital Library
Author	Xuejue Huang Wen-Chin Lee Kuo, C. Hisamoto, D. Leland Chang Kedzierski, J. Anderson, E. Takeuchi, H. Yang-Kyu Choi Asano, K. Subramanian, V. Tsu-Jae King Bokor, J. Chenming Hu
Copyright Year	1963
Abstract	High-performance PMOSFETs with sub-50-nm gate-length are reported. A self-aligned double-gate MOSFET structure (FinFET) is used to suppress the short-channel effects. This vertical double-gate SOI MOSFET features: 1) a transistor channel which is formed on the vertical surfaces of an ultrathin Si fin and controlled by gate electrodes formed on both sides of the fin; 2) two gates which are self-aligned to each other and to the source/drain (S/D) regions; 3) raised S/D regions; and 4) a short (50 nm) Si fin to maintain quasi-planar topology for ease of fabrication. The 45-nm gate-length p-channel FinFET showed an I/sub dsat/ of 820 /spl mu/A//spl mu/m at V/sub ds/=V/sub gs/=1.2 V and T/sub ox/=2.5 mm. Devices showed good performance down to a gate-length of 18 nm. Excellent short-channel behavior was observed. The fin thickness (corresponding to twice the body thickness) is found to be critical for suppressing the short-channel effects. Simulations indicate that the FinFET structure can work down to 10 nm gate length. Thus, the FinFET is a very promising structure for scaling CMOS beyond 50 nm.
Sponsorship	IEEE Electron Devices Society
Starting Page	880
Ending Page	886
Page Count	7
File Size	170147
File Format	PDF
ISSN	00189383
Volume Number	48
Issue Number	5
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2001-05-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	MOSFETs
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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