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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Morizio, J.C. Hoke, I.M. Kocak, T. Geddie, C. Hughes, C. Perry, J. Madhavapeddi, S. Hood, M.H. Lynch, G. Kondoh, H. Kumamoto, T. Okuda, T. Noda, H. Ishiwaki, M. Miki, T. Nakaya, M. |
| Copyright Year | 1966 |
| Abstract | This paper presents the design and test results of a fourth-order and sixth-order 14-bit 2.2-MS/s sigma-delta analog-to-digital converter (ADC). The analog modulator and digital decimator sections were implemented in a 0.35 /spl mu/m CMOS double-poly triple-level metal 3.3-V process. The design objective for these ADC's was to achieve 85 dB signal-to-noise distortion ratio (SNDR) with less than 200 mW power dissipation. Both modulators employ a cascade sigma-delta topology. The fourth-order modulator consists of two cascaded second-order stages which include 1-bit and 5-bit quantizers, respectively. The sixth-order modulator has a 2-2-2 cascade structure and 1-bit quantizer at the end of each stage. An oversampling ratio of 24 was selected to give the best SNDR and power consumption with realizable gain-matching requirements between the analog and digital sections. |
| Sponsorship | IEEE Solid-State Circuits Society IEEE Electron Devices Society IEEE Circuits and Systems Society Japan Society of Applied Physics (JSAP) IEEE Microwave Theory and Techniques Society IEEE San Francisco Section Bay Area Council Univ. PA IEEE |
| Starting Page | 968 |
| Ending Page | 976 |
| Page Count | 9 |
| File Size | 277587 |
| File Format | |
| ISSN | 00189200 |
| Volume Number | 35 |
| Issue Number | 7 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2000-07-01 |
| Publisher Place | U.S.A. |
| Access Restriction | One Nation One Subscription (ONOS) |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Delta-sigma modulation Testing Analog-digital conversion Digital modulation CMOS process Process design Signal design Distortion Power dissipation Topology |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electrical and Electronic Engineering |
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