NDLI: Configurable logic for digital communications: some signal processing perspectives

Content Provider	IEEE Xplore Digital Library
Author	Dick, C. Harris, F.J.
Copyright Year	1979
Abstract	For the past two decades software programmable digital signal processors and ASICs have provided hardware solutions for signal processing system designers. A new option has become available: field programmable gate arrays. FPGA-based DSP platforms allow the designer to realize a data path that exactly matches the required processing, while at the same time maintaining the flexibility of a software approach. This article presents an overview of some FPGA DSP applications. Several filter designs are presented, and the use of CORDIC arithmetic for constructing an FPGA carrier recovery loop is outlined. In addition to presenting design examples that can be realized using present-generation devices and tools, we take a brief look at how the dynamic reconfiguration aspect of certain FPGAs could be exploited in future-generation communication technologies.
Starting Page	107
Ending Page	111
Page Count	5
File Size	619187
File Format	PDF
ISSN	01636804
Volume Number	37
Issue Number	8
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1999-08-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Digital communication Field programmable gate arrays Digital signal processing Digital signal processors Hardware Array signal processing Process design Signal design Programmable logic arrays Software maintenance
Content Type	Text
Resource Type	Article
Subject	Computer Networks and Communications Electrical and Electronic Engineering Computer Science Applications

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