NDLI: High-performance 0.07-μm CMOS with 9.5-ps gate delay and 150 GHz f/sub T/

Content Provider	IEEE Xplore Digital Library
Author	Wann, C. Assaderaghi, F. Shi, L. Chan, K. Cohen, S. Hovel, H. Jenkins, K. Lee, Y. Sadana, D. Viswanathan, R. Wind, S. Taur, Y.
Copyright Year	1980
Abstract	We report room-temperature 0.07-/spl mu/m CMOS inverter delays of 13.6 ps at 1.5 V and 9.5 ps at 2.5 V for an SOI substrate; 16 ps at 1.5 V and 12 ps at 2.5 V for a bulk substrate. This is the first room-temperature sub-10 ps inverter ring oscillator delay ever reported. PFETs with very high drive current and reduction in parasitic resistances and capacitances for both NFETs and PFETs, realized by careful thermal budget optimization, contribute to the fast device speed. Moreover, the fast inverter delay was achieved without compromising the device short-channel characteristics. At V/sub dd/=1.5 V and I/sub off//spl sim/2.5 nA//spl mu/m, minimum L/sub eff/ is about 0.085 /spl mu/m for NFETs and 0.068 /spl mu/m for PFETs. PFET I/sub on/ is 360 /spl mu/A//spl mu/m, which is the highest value ever reported at comparable V/sub dd/ and I/sub off/. The SOI MOSFET has about one order of magnitude higher I/sub off/ than a bulk MOSFET due to the floating-body effect. At around 0.07 /spl mu/m L/sub eff/, the NFET cut-off frequencies are 150 GHz for SOI and 135 GHz for bulk. These performance figures suggest that subtenth-micron CMOS is ready for multi-gigahertz digital circuits, and has good potential for RF and microwave applications.
Sponsorship	IEEE Electron Devices Society
Starting Page	625
Ending Page	627
Page Count	3
File Size	83403
File Format	PDF
ISSN	07413106
Volume Number	18
Issue Number	12
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1997-12-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Delay Inverters MOSFET circuits Ring oscillators Parasitic capacitance Thermal resistance Cutoff frequency CMOS digital integrated circuits Digital circuits Radio frequency
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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