NDLI: On correction of multiple design errors

Content Provider	IEEE Xplore Digital Library
Author	Pomeranz, I. Reddy, S.M.
Copyright Year	1982
Abstract	We consider the problem of correcting multiple design errors in combinational circuits and in finite-state machines. The correction method introduced for combinational circuits uses a single error correction scheme iteratively to correct multiple errors. It uses a heuristic measure that guides the selection of single, local circuit modifications that reduce the distance between the incorrect implementation and the specification. The distance is measured by the size of a correction hardware, which is a block of logic that can be added to the implementation in order to correct it without performing additional circuit modifications. The correction method for finite-state machines is based on the use of pairwise distinguishing sequences for specification and implementation states, and employs the same hardware correction scheme. Experimental results are presented to support the effectiveness of the proposed methods.<>
Sponsorship	IEEE Council on Electronic Design Automation IEEE Circuits and Systems Society
Starting Page	255
Ending Page	264
Page Count	10
File Size	1220803
File Format	PDF
ISSN	02780070
Volume Number	14
Issue Number	2
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1995-02-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Error correction Computer errors Combinational circuits Hardware Equations Circuit testing Size measurement Logic circuits Performance evaluation Very large scale integration
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Electrical and Electronic Engineering Software

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Diagnosis and correction of multiple logic design errors in digital circuits

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On correction of multiple design errors

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