NDLI: An X-band high-efficiency MMIC power amplifier with 20-dB return losses

Content Provider	IEEE Xplore Digital Library
Author	Le, H.M. Shih, Y.-C. Hwang, V.D. Chi, T.Y. Kasel, K.J. Wang, D.C.
Copyright Year	1966
Abstract	Describes the design principles and measured performance of an X-band high-efficiency monolithic-microwave-integrated-circuit (MMIC) power amplifier and discuss pertinent factors of the ion-implantation process. Also presented is a worst-case power prediction of the chip performance and a large-signal design using small-signal simulation. This balanced amplifier is fully monolithic with input and output return losses of better than 20 dB provided by Lange couplers. These return losses make it very convenient to cascade with other components. For high-efficiency operation, the drain voltage is 6 V. Across the 40% bandwidth from 8 to 12 GHz, the amplifier produces 1.6 to 2.1 W of output power at 33 to 40% power-added efficiency. For high-power operation, the drain voltage is 8.5 V. The amplifier can produce 2.4 to 2.8 W of output power at 26 to 29% power-added efficiency across the same 40% bandwidth.<>
Sponsorship	IEEE Solid-State Circuits Society IEEE Electron Devices Society IEEE Circuits and Systems Society Japan Society of Applied Physics (JSAP) IEEE Microwave Theory and Techniques Society IEEE San Francisco Section Bay Area Council Univ. PA IEEE
Starting Page	1383
Ending Page	1389
Page Count	7
File Size	898368
File Format	PDF
ISSN	00189200
Volume Number	26
Issue Number	10
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1991-10-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	High power amplifiers Voltage Bandwidth Operational amplifiers Power generation Power amplifiers Power measurement Semiconductor device measurement MMICs Predictive models
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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