NDLI: Trends in megabit DRAM circuit design

Content Provider	IEEE Xplore Digital Library
Author	Itoh, K.
Copyright Year	1966
Abstract	The state of the art in megabit dynamic random access memory (DRAM) circuit and chip design is reviewed in terms of essential design parameters such as signal-to-noise ratio, power dissipation, and speed. The memory cell signal charge has decreased gradually with an increase in memory cell size, despite the vertically structured cell designs. To offset this decrease, multidivided data-line structures, low-power design, and transposition of folded data lines are essential. To reduce power dissipation, an increase in the maximum refresh cycle and multidivided data lines combined with shared I/O in addition to a reduced operating voltage are efficient. A BiCMOS circuit provides a high-speed access time with low cost due to the high drivability of the driver and high sensitivity of the amplifier. It is predicted that the current DRAM technology might be diversified in the future so that a large-memory-capacity-oriented technology would coexist with a high-speed-oriented technology, posing power-supply standardization as a continuing serious concern.<>
Sponsorship	IEEE Solid-State Circuits Society IEEE Electron Devices Society IEEE Circuits and Systems Society Japan Society of Applied Physics (JSAP) IEEE Microwave Theory and Techniques Society IEEE San Francisco Section Bay Area Council Univ. PA IEEE
Starting Page	778
Ending Page	789
Page Count	12
File Size	1125117
File Format	PDF
ISSN	00189200
Volume Number	25
Issue Number	3
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1990-06-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Random access memory Circuit synthesis Signal design Power dissipation DRAM chips Chip scale packaging Signal to noise ratio Voltage BiCMOS integrated circuits Costs
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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