NDLI: A study of two approaches for reconfiguring fault-tolerant systolic arrays

Content Provider	IEEE Xplore Digital Library
Author	Lam, C.W.H. Li, H.F. Jayakumar, R.
Copyright Year	1968
Abstract	Presents a critical study of two approaches, the classical RC-cut approach and H.T. Kung and M.S. Lam's (Proc. 1984 MIT Conf. Advanced Res. VLSI p.74-83, 1984) RCS-cut approach, for reconfiguring faulty systolic arrays. The amount of cell (processing element) redundancy needed to ensure successful reconfiguration into an nn array is considered. It is shown that no polynomial bounded redundancy is sufficient for the classical approach, whereas O(n/sup 2/log n) redundancy is sufficient for the Kung and Lams approach. The number of faulty cells that can be tolerated in a given array regardless of their locations is characterized and derived. It is shown that, for both approaches, in almost all cases a square array has better fault tolerance than a rectangular array having the same number of cells. A minimal fault pattern in a 2n2n array with 3n+1 faults that is not reconfigurable into an n*n array using either of the two approaches is established.<>
Sponsorship	IEEE Computer Society Technical Committee on Distributed Process IEEE Computer Society Technical Committee on VLSI IEEE Technical Committee on Computer Architecture IEEE Computer Society
Starting Page	833
Ending Page	844
Page Count	12
File Size	1083821
File Format	PDF
ISSN	00189340
Volume Number	38
Issue Number	6
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1989-06-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Fault tolerance Systolic arrays Circuit faults Redundancy Fabrication Polynomials Very large scale integration Pattern analysis Geometry Process design
Content Type	Text
Resource Type	Article
Subject	Theoretical Computer Science Computational Theory and Mathematics Software Hardware and Architecture

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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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