NDLI: Concurrent Fault Detection in Microprogrammed Control Units

Content Provider	IEEE Xplore Digital Library
Author	Iyengar, V.S. Kinney, L.L.
Copyright Year	1968
Abstract	This paper specifies procedures for defining a monitor circuit that can detect faults in microprogram sequencers. The monitor and the sequencer operate in parallel and errors are detected by comparing outputs from the monitor circuit with outputs from the sequencer. Faults that cause errors in the flow of control are detectable, as well as some faults that cause errors only in the microinstruction fields. The design procedure presented for monitors consists of four parts. First, a model of the program flow is constructed that only retains the information required to define a monitor. Second, faults in a specified fault set are modeled by the errors they cause in the program flow model. Third, the functional requirements of the monitor are specified in terms of partitions on the states of the program flow model. Fourth, the logic design of the monitor is completed.
Sponsorship	IEEE Computer Society Technical Committee on Distributed Process IEEE Computer Society Technical Committee on VLSI IEEE Technical Committee on Computer Architecture IEEE Computer Society
Starting Page	810
Ending Page	821
Page Count	12
File Size	3577501
File Format	PDF
ISSN	00189340
Volume Number	C-34
Issue Number	9
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1985-09-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	self-testing Concurrent error detection error-detecting codes fault secure microprogrammed controller monitors partition algebra
Content Type	Text
Resource Type	Article
Subject	Theoretical Computer Science Computational Theory and Mathematics Software Hardware and Architecture

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