NDLI: A metal-oriented layout structure for CMOS logic

Content Provider	IEEE Xplore Digital Library
Author	Piguet, C. Zahnd, J. Stauffer, A. Bertarionne, M.
Copyright Year	1966
Description	A design method is described for the realization of large digital modules of random logic for custom integrated circuits in CMOS technology. The layout structure is based on the gate matrix concept with a metal orientation instead of a polysilicon orientation. The symbolic layout is obtained by using 11 different microcells with simple assembly rules. It is derived from the functional specifications of the circuit (Karnaugh maps) using a very simple and attractive method. A CAD program for translating the symbolic layout into a geometrical one is described. It works by assembling geometrical microcells. The advantages and disadvantages of the metal-oriented structure are analyzed through examples of industrial designs. The technique is not suitable for fast circuits. However, it results in an improvement of productivity by a factor of about four and a packing density for large modules which is at least comparable with that of nonoriented hand layouts.
Sponsorship	IEEE Solid-State Circuits Society IEEE Electron Devices Society IEEE Circuits and Systems Society Japan Society of Applied Physics (JSAP) IEEE Microwave Theory and Techniques Society IEEE San Francisco Section Bay Area Council Univ. PA IEEE
Starting Page	425
Ending Page	436
Page Count	12
File Size	2019582
File Format	PDF
ISSN	00189200
Volume Number	19
Issue Number	3
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1984-06-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	CMOS logic circuits CMOS technology Microcell networks Assembly Design methodology Logic design Application specific integrated circuits CMOS digital integrated circuits Integrated circuit technology Design automation
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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