NDLI: Some aspects of time-division data switch design

Content Provider	IEEE Xplore Digital Library
Author	Tomita, S. Yukimatsu, K. Mizuno, T. Miyaho, N.
Copyright Year	1963
Abstract	A number of techniques for configuring circuit switching data network carrying mixed bearer rate traffic are discussed. In the network, blocking probability unbalance among different bearer rates arises on highway and switch, for example, due to fractional occupation of usable channel for high bearer rate call by lower bearer rate call. Such a problem due to handling mixed bearer rate traffic is first described. Several solutions to this problem are presented and evaluated in terms of memory amount, delay time through switch, and dynamic program steps required for path search procedure. This paper concludes that single-stage time-division switch (T switch) is suitable for data purpose, so far as switch size is relatively small. Also presented are fundamental techniques for designing a T switch with reduced memory chips and reduced memory speed requirement. T switch configuration varieties based on these techniques are quantitatively evaluated. A design method for the most economical and flexible T switch under conditions such as usable memory, traffic distribution in data speed, and local network configuration, is established.
Sponsorship	IEEE Publication
Starting Page	1295
Ending Page	1304
Page Count	10
File Size	1036550
File Format	PDF
ISSN	00189219
Volume Number	65
Issue Number	9
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1977-09-01
Publisher Place	U.S.A.
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Switches Switching circuits Packet switching Telecommunication traffic Communication switching Road transportation Delay effects Data communication Design methodology Telegraphy
Content Type	Text
Resource Type	Article
Subject	Computer Science Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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