NDLI: Subthreshold design considerations for insulated gate field-effect transistors

Content Provider	IEEE Xplore Digital Library
Author	Troutman, R.R.
Copyright Year	1966
Description	A knowledge of subthreshold behavior in an insulated gate field-effect transistor is important for circuits with low leakage specifications. This paper discusses the effect of drain voltage on the subthreshold region as the channel length becomes shorter, the effect of substrate bias on both the shift in and the slope of the subthreshold curves, and the effect of temperature on the subthreshold current characteristics. It is shown that all these effects can be incorporated into a simple one-dimensional model.
Sponsorship	IEEE Solid-State Circuits Society IEEE Electron Devices Society IEEE Circuits and Systems Society Japan Society of Applied Physics (JSAP) IEEE Microwave Theory and Techniques Society IEEE San Francisco Section Bay Area Council Univ. PA IEEE
Starting Page	55
Ending Page	60
Page Count	6
File Size	706300
File Format	PDF
ISSN	00189200
Volume Number	9
Issue Number	2
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1974-04-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Insulation FETs Voltage Circuits Subthreshold current Large scale integration Logic design Electrical engineering Electron emission Telephony
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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Subthreshold design considerations for insulated gate field-effect transistors