NDLI: Implementing Synchronous Ethernet in Telecommunication Systems

Content Provider	IEEE Xplore Digital Library
Author	Aweya, J.
Copyright Year	1998
Abstract	Network infrastructures are gradually migrating from time-division multiplexing (TDM) based onto packet-based architectures. In spite of this convergence, there are a significant number of synchronous applications that require accurate timing to be distributed over the packet networks. Examples of precision timing sensitive applications that need the transport of synchronization over packet networks include interconnection and transport of TDM services over packet networks (TDM switches, TDM PBXs, voice, video-conferencing and broadband video), and connections to 2G, 3G, and 4G wireless base stations. TDM networks, unlike packet networks (e.g., Ethernet, IP, MPLS), have timing transfer inherently built into them. Native Ethernet (IEEE 802.3) is inherently asynchronous and was not designed with timing transfer in mind. Synchronous Ethernet (Sync-E), defined by the ITU-T, has emerged as a powerful, yet simple technology, for accurate timing transfer over Ethernet networks using quotedblleft TDM-likequotedblright (precisely, SDH/SONET) timing techniques. This discussion explains what Sync-E is, followed by a detailed discussion on which flavors of Ethernet can support Sync-E and which cannot. The discussion includes how Sync-E can be implemented in the popular Ethernet versions. We then describe example Sync-E node timing architectures, and some network timing applications and related issues.
Starting Page	1080
Ending Page	1113
Page Count	34
File Size	2396693
File Format	PDF
ISSN	1553877X
Volume Number	16
Issue Number	2
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-01-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Synchronization Synchronous digital hierarchy SONET Telecommunications Time division multiplexing Physical layer mobile backhaul Synchronous Ethernet clock synchronization timing and synchronization timing distribution clock recovery phase-locked loop clock and data recovery
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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