NDLI: Compressive Sensing Wireless Channel Modeling With Digital Map

Content Provider	IEEE Xplore Digital Library
Author	Chao Zhang Junzhou Yu
Copyright Year	2002
Abstract	Channel model plays a very important role in the wireless communication systems for verification of the key technologies in the mobile communications, such as modulation, coding and antenna design, etc. Usually, the channel model can be achieved by experimental method, which needs a large amount of measured data. In order to save the cost, some electromagnetic methods have been proposed to simulate the channel model, such as ray tracing and finite-difference time domain (FDTD). These methods can provide a good approximation of the real channel. However, in the traditional way, the uniform sampling is adopted, and the amount of simulated data is quite large. It costs a great deal of calculation and memory resources, which results in a time-exhausted computation. In this letter, compressive sensing (CS) is employed to decrease the complexity in channel modeling with simulation by digital map. The sparsity of the receiving signal is revealed and highlighted, which leads to the fact that the signal can be measured randomly less than the traditional Nyquist sampling rate. The simulation confirms that the complexity can be reduced at least 90% with root mean square error (RMSE) less than 10^-2.
Sponsorship	IEEE Antennas and Propagation Society
Starting Page	349
Ending Page	352
Page Count	4
File Size	890685
File Format	PDF
ISSN	15361225
Volume Number	12
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-01-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Ray tracing Complexity theory Computational modeling Sparse matrices Compressed sensing Channel models Transforms ray tracing Channel model compressive sensing
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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