NDLI: Real-Time Vehicle Identification Performance Using FPGA Correlator Hardware

Content Provider	IEEE Xplore Digital Library
Author	McDonald, G.J. Ellis, J.S. Penney, R.W. Price, R.W.
Copyright Year	2000
Abstract	A real-time automatic vehicle correlator system that is capable of identifying the make, model, and series of road traffic, e.g., a Volkswagen Golf Mark 4, has been implemented in field-programmable gate array (FPGA) hardware housed on a peripheral component interconnect (PCI)-format electronic board. The system is compatible with standard desktop personal computers and accepts imagery from networked cameras. The vehicle correlation operates in conjunction with an automatic number plate recognition (ANPR) system, which acts as a coarse filter and determines the presence of a new vehicle to be identified. When the vehicle correlator is presented with a new image by the ANPR system, it correlates this image against a large database of many thousands of reference images, which represent the many vehicle variants typically found in that regional jurisdiction. The FPGA vehicle correlator can perform 10 000 correlations per second, allowing timely vehicle identification in less than 1 s when comparing against 8192 reference vehicle images. In a large-scale trial of 991 input vehicles, the vehicle correlator correctly identified 84% of the test images using a database of 62 different vehicle variants.
Sponsorship	IEEE Intelligent Transportation Systems Society
Starting Page	1891
Ending Page	1895
Page Count	5
File Size	690506
File Format	PDF
ISSN	15249050
Volume Number	13
Issue Number	4
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-12-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Pattern recognition Field programmable gate arrays Real-time systems Correlation road vehicle identification field-programmable gate arrays (FPGAs) pattern recognition equipment
Content Type	Text
Resource Type	Article
Subject	Automotive Engineering Mechanical Engineering Computer Science Applications

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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