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Application of multirate digital filter banks to wideband all-digital phase-locked loops design
| Content Provider | NASA Technical Reports Server (NTRS) |
|---|---|
| Author | Sadr, R. Shah, B. Hinedi, S. |
| Copyright Year | 1992 |
| Description | A new class of architecture for all-digital phase-locked loops (DPLL's) is presented in this article. These architectures, referred to as parallel DPLL (PDPLL), employ multirate digital filter banks (DFB's) to track signals with a lower processing rate than the Nyquist rate, without reducing the input (Nyquist) bandwidth. The PDPLL basically trades complexity for hardware-processing speed by introducing parallel processing in the receiver. It is demonstrated here that the DPLL performance is identical to that of a PDPLL for both steady-state and transient behavior. A test signal with a time-varying Doppler characteristic is used to compare the performance of both the DPLL and the PDPLL. |
| File Size | 702774 |
| Page Count | 17 |
| File Format | |
| Alternate Webpage(s) | http://archive.org/details/NASA_NTRS_Archive_19930009719 |
| Archival Resource Key | ark:/13960/t26b2275s |
| Language | English |
| Publisher Date | 1992-11-15 |
| Access Restriction | Open |
| Subject Keyword | Electronics And Electrical Engineering Gallium Arsenides Digital Systems Phase Locked Systems Semiconductor Devices Broadband Bandwidth Receivers Digital Filters Cmos Parallel Processing Computers Ntrs Nasa Technical Reports Server (ntrs) Nasa Technical Reports Server Aerodynamics Aircraft Aerospace Engineering Aerospace Aeronautic Space Science |
| Content Type | Text |
| Resource Type | Article |
