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Architecture for vlsi design of reed-solomon encoders
| Content Provider | NASA Technical Reports Server (NTRS) |
|---|---|
| Author | Liu, K. Y. |
| Copyright Year | 1981 |
| Description | The logic structure of a universal VLSI chip called the symbol-slice Reed-Solomon (RS) encoder chip is discussed. An RS encoder can be constructed by cascading and properly interconnecting a group of such VLSI chips. As a design example, it is shown that a (255,223) RD encoder requiring around 40 discrete CMOS ICs may be replaced by an RS encoder consisting of four identical interconnected VLSI RS encoder chips. Besides the size advantage, the VLSI RS encoder also has the potential advantages of requiring less power and having a higher reliability. |
| File Size | 3171961 |
| Page Count | 52 |
| File Format | |
| Alternate Webpage(s) | http://archive.org/details/NASA_NTRS_Archive_19820017925 |
| Archival Resource Key | ark:/13960/t84j59x5w |
| Language | English |
| Publisher Date | 1981-06-08 |
| Access Restriction | Open |
| Subject Keyword | Computer Operations And Hardware Multiplexing Finite Element Method Coders Computer Programming Logical Elements Space Communication Very Large Scale Integration Shift Registers Polynomials Chips Electronics Architecture Computers Error Correcting Codes Ntrs Nasa Technical Reports Server (ntrs) Nasa Technical Reports Server Aerodynamics Aircraft Aerospace Engineering Aerospace Aeronautic Space Science |
| Content Type | Text |
| Resource Type | Technical Report |
