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Fault-tolerant computer study. [logic designs for building block circuits
| Content Provider | NASA Technical Reports Server (NTRS) |
|---|---|
| Author | Rennels, D. A. Avizienis, A. A. Ercegovac, M. D. |
| Copyright Year | 1981 |
| Description | A set of building block circuits is described which can be used with commercially available microprocessors and memories to implement fault tolerant distributed computer systems. Each building block circuit is intended for VLSI implementation as a single chip. Several building blocks and associated processor and memory chips form a self checking computer module with self contained input output and interfaces to redundant communications buses. Fault tolerance is achieved by connecting self checking computer modules into a redundant network in which backup buses and computer modules are provided to circumvent failures. The requirements and design methodology which led to the definition of the building block circuits are discussed. |
| File Size | 9941131 |
| Page Count | 240 |
| File Format | |
| Alternate Webpage(s) | http://archive.org/details/NASA_NTRS_Archive_19810010149 |
| Archival Resource Key | ark:/13960/t83j89006 |
| Language | English |
| Publisher Date | 1981-02-01 |
| Access Restriction | Open |
| Subject Keyword | Computer Operations And Hardware Chips Memory Devices Fault Tolerance Computer Components Redundant Components Large Scale Integration Logic Design Chips Electronics Multiprocessing Computers Computer Design Ntrs Nasa Technical Reports Server (ntrs) Nasa Technical Reports Server Aerodynamics Aircraft Aerospace Engineering Aerospace Aeronautic Space Science |
| Content Type | Text |
| Resource Type | Technical Report |
