NDLI: Multiprocessor architectural study

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Multiprocessor architectural study

Content Provider	NASA Technical Reports Server (NTRS)
Author	Stanten, S. F. Vandever, W. H. Kosmala, A. L.
Copyright Year	1972
Description	An architectural design study was made of a multiprocessor computing system intended to meet functional and performance specifications appropriate to a manned space station application. Intermetrics, previous experience, and accumulated knowledge of the multiprocessor field is used to generate a baseline philosophy for the design of a future SUMC* multiprocessor. Interrupts are defined and the crucial questions of interrupt structure, such as processor selection and response time, are discussed. Memory hierarchy and performance is discussed extensively with particular attention to the design approach which utilizes a cache memory associated with each processor. The ability of an individual processor to approach its theoretical maximum performance is then analyzed in terms of a hit ratio. Memory management is envisioned as a virtual memory system implemented either through segmentation or paging. Addressing is discussed in terms of various register design adopted by current computers and those of advanced design.
File Size	8010250
Page Count	176
File Format	PDF
Alternate Webpage(s)	http://archive.org/details/NASA_NTRS_Archive_19730011492
Archival Resource Key	ark:/13960/t8x96zv4g
Language	English
Publisher Date	1972-11-01
Access Restriction	Open
Subject Keyword	Response Time Computers Central Processing Units Performance Addressing Computer Design Space Stations Ntrs Nasa Technical Reports Server (ntrs) Nasa Technical Reports Server Aerodynamics Aircraft Aerospace Engineering Aerospace Aeronautic Space Science
Content Type	Text
Resource Type	Technical Report

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