An RLC Interconnect Model Based on Fourier Analysis

Content Provider	CiteSeerX
Abstract	Abstract—Based on a Fourier series analysis, an analytic interconnect model is presented which is suitable for periodic signals, such as a clock signal. In this model, the far-end time-domain waveform is approximated by the summation of several sinusoids. Closed-form solutions of the 50 % delay and overshoots/undershoots are provided when the fifth and higher order harmonics are ignored. Good accuracy is observed between the model and SPICE simulations. The model is applied to resistance–capacitance–inductance interconnect trees and the computational complexity of the model is linear with the size of the tree and the model order. The tree model is shown to be an effective method to analyze clock distribution networks. The single interconnect model is also extended to coupled multi-interconnect systems to analyze crosstalk noise and a general waveform solution is obtained. It is noted that in addition to the transition time, the period of the aggressor signal also has a significant effect on the crosstalk noise. Index Terms—Clock tree synthesis, Fourier analysis, interconnect, noise analysis, resistance–capacitance–inductance (RLC),
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Subject Keyword	Fourier Analysis Rlc Interconnect Model Crosstalk Noise Analytic Interconnect Model Overshoot Undershoots Noise Analysis Resistance Capacitance Inductance Several Sinusoid Significant Effect Good Accuracy Aggressor Signal Clock Distribution Network Closed-form Solution Computational Complexity Fourier Series Analysis Single Interconnect Model Tree Model Index Term Clock Tree Synthesis Periodic Signal Spice Simulation Capacitance Inductance Interconnect Tree Effective Method Transition Time Multi-interconnect System Far-end Time-domain Waveform Clock Signal General Waveform Solution Model Order Order Harmonic
Content Type	Text