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Reevaluating online superpage promotion with hardware support (2001)
| Content Provider | CiteSeerX |
|---|---|
| Author | Mckee, Sally A. Fang, Zhen Carter, John B. Hsieh, Wilson C. Zhang, Lixin |
| Description | In Proceedings of the Seventh International Symposium on High Performance Computer Architecture |
| Abstract | Typical translation lookaside buffers (TLBs) can map a far smaller region of memory than application footprints demand, and the cost of handling TLB misses therefore limits the performance of an increasing number of applications. This bottleneck can be mitigated by the use of superpages, multiple adjacent virtual memory pages that can be mapped with a single TLB entry, that extend TLB reach without significantly increasing size or cost. We analyze hardware/software tradeoffs for dynamically creating superpages. This study extends previous work by using execution-driven simulation to compare creating superpages via copying with remapping pages within the memory controller, and by examining how the tradeoffs change when moving from a single-issue to a superscalar processor model. We find that remapping-based promotion outperforms copyingbased promotion, often significantly. Copying-based promotion is slightly more effective on superscalar processors than on single-issue processors, and the relative performance of remapping-based promotion on the two platforms is application-dependent. 1 |
| File Format | |
| Publisher Date | 2001-01-01 |
| Access Restriction | Open |
| Subject Keyword | Application Footprint Demand Memory Controller Superscalar Processor Model Single-issue Processor Copying-based Promotion Execution-driven Simulation Remapping-based Promotion Multiple Adjacent Virtual Memory Page Online Superpage Promotion Tlb Reach Hardware Software Tradeoff Single Tlb Entry Remapping-based Promotion Outperforms Typical Translation Lookaside Buffer |
| Content Type | Text |
| Resource Type | Proceeding Conference Proceedings |