Loading...
Please wait, while we are loading the content...
Similar Documents
The Blacklisting Memory Scheduler: Balancing Performance, Fairness and Complexity
| Content Provider | CiteSeerX |
|---|---|
| Author | Subramanian, Lavanya Lee, Donghyuk Seshadri, Vivek Rastogi, Harsha Mutlu, Onur |
| Abstract | Abstract—In a multicore system, applications running on different cores interfere at main memory. This inter-application interference degrades overall system performance and unfairly slows down applications. Prior works have developed application-aware memory request schedulers to tackle this problem. State-of-the-art application-aware memory request schedulers prioritize memory requests of applications that are vulner-able to interference, by ranking individual applications based on their memory access characteristics and enforcing a total rank order. In this paper, we observe that state-of-the-art application-aware memory schedulers have two major shortcomings. First, such sched-ulers trade off hardware complexity in order to achieve high performance or fairness, since ranking applications individually with a total order based on memory access characteristics leads to high hardware cost and complexity. Such complexity could prevent the scheduler from meeting the stringent timing requirements of state-of-the-art DDR pro- |
| File Format | |
| Access Restriction | Open |
| Content Type | Text |
