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Heterogeneous Integration of Enhancement Mode In0.7Ga0.3As Quantum Well Transistor on Silicon Substrate using Thin ( ≤ 2 µm) Composite Buffer Architecture for High-Speed and Low-voltage ( 0.5V) Logic Applications
| Content Provider | CiteSeerX |
|---|---|
| Author | Pillarisetty, R. Rachmady, W. Radosavljevic, M. Rakshit, T. Chau, Robert |
| Abstract | This paper describes for the first time, the heterogeneous integration of In0.7Ga0.3As quantum well device structure on Si substrate through a novel, thin composite metamorphic buffer architecture with the total composite buffer thickness successfully scaled down to 1.3µm, resulting in high-performance short-channel enhancement-mode In0.7Ga0.3As QWFETs on Si substrate for future high-speed digital logic applications at low supply voltage such as 0.5V. |
| File Format | |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |