Multi-Rate Segmented Time-Interleaved Current Steering DAC with Unity-Elements Sharing

Content Provider	CiteSeerX
Author	Aksin, Devrim Ozbek, Gurer Maloberti, Franco
Abstract	Abstract — A novel multi-rate Time-Interleaved Current Steer-ing Digital to Analog Converter with unity element sharing is presented. Proposed 12-bit DAC is simulated in 90nm CMOS technology. The implemented DAC is divided to two segments, MSB and LSB segments, each having 6 bits of resolution. Taking advantage of the oversampling requirement due to the recon-struction filter at the DAC output, the MSB segment is further separated to 6 subDACs to implement time-interleaved and return-to-zero techniques. Time interleaved technique reduces the switching speed of each individual unit element to 1/6th of the sampling clock frequency and RTZ technique improves the linearity of the DAC. Simulations show that employed technique improves the linearity over 6dB with an SFDR of 85dB with 6GS/s sampling frequency and 460MHz input frequency. The DAC draws 13mA from a 1.5V supply. The expected active area of the DAC is 1mm2. I.
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