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Using Channel Pipelining in Reconfigurable Interconnection Networks (1998)
| Content Provider | CiteSeerX |
|---|---|
| Author | Duato, Jose Sanchez, Jose L. Garca, Jose M. Aut, Sist Comp |
| Description | In 6th Euromicro Workshop on Parallel and Distributed Processing |
| Abstract | The major problem in wormhole routing networks is related with the contention due to message blocking. Reconfigurable networks are an alternative to reduce the negative effect that congestion produces on the performance of the network. Our work is focused on dynamic reconfiguration. This technique consists basically of placing the different processors in the network in those positions which, at each computational moment and according to the existing communication pattern among them, are more adequate for the development of such computation. In a reconfigurable architecture, the clock period is determined by the transmission time across the switch. To increase this frequency the channel pipelined technique is used. |
| File Format | |
| Publisher Date | 1998-01-01 |
| Access Restriction | Open |
| Subject Keyword | Reconfigurable Network Transmission Time Reconfigurable Architecture Clock Period Reconfigurable Interconnection Network Computational Moment Different Processor Wormhole Routing Network |
| Content Type | Text |
| Resource Type | Conference Proceedings |
