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Bump Formation and Flip Chip Processes for RF System-on-Packages
| Content Provider | CiteSeerX |
|---|---|
| Author | Lee, Kwang-Yong Choi, Eun-Kyoung Seo, Kwang-Seok Jung, Boo-Yang Jeon, Young-Soo Oh, Tae-Sung |
| Abstract | Abstract. For flip-chip process of RF system-on-packages(SOP), double bump bonding processes were investigated. Sn-Ag and Sn solder joints were formed by the reflowed double bumping process, and Sn/In/Sn bump joints were fabricated by the non-reflowed double bump bonding process. The height-to-size ratios of 0.78 and 0.65 were obtained for the reflowed double bumping and the non-reflowed bumping, respectively. Average contact resistance of the reflowed Sn-Ag and Sn solder joints was about 13mΩ which was much lower than 24~33mΩ of the non-reflowed Sn/In/Sn bump joints. The reflowed solder double bumping method is more suitable for flip-chip process of RF-SOP than the non-reflowed double bump bonding. |
| File Format | |
| Access Restriction | Open |
| Subject Keyword | Non-reflowed Bumping Flip Chip Process Double Bump Bonding Process Reflowed Solder Double Bumping Method Double Bumping Height-to-size Ratio Double Bumping Process Flip-chip Process Sn Solder Joint Non-reflowed Double Bump Bonding Non-reflowed Sn Bump Formation Rf System-on-packages Non-reflowed Double Bump Sn Bump Joint Average Contact Resistance |
| Content Type | Text |
| Resource Type | Article |