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Generating systemc implementations for clock constraints specified in uml/marte ccsl.
| Content Provider | CiteSeerX |
|---|---|
| Author | Peters, Judith Wille, Robert Drechsler, Rolf |
| Abstract | Abstract—Due to the increasing complexity of today’s embed-ded systems, the design on higher levels of abstraction becomes more and more important. In this context, modeling languages such as UML and its profile MARTE received significant atten-tion in the recent past. They provide formal descriptions that can be exploited to automatically generate initial implementations of a system e. g. in SystemC. While corresponding approaches have been developed in the past, they often focused on functional specifications. Besides that, also non-functional behavior such as clocking constraints needs to be considered in this process. In this work, we propose an approach which addresses this gap. Given a formal specification of clocking constraints specified in the Clock Constraint Specification Language (CCSL; a MARTE accessory), we propose an automatic code generation scheme which enriches an existing SystemC implementation by a module triggering the desired clocks in the system. I. |
| File Format | |
| Access Restriction | Open |
| Subject Keyword | Systemc Implementation Uml Marte Ccsl Clock Constraint Specified Functional Specification Marte Accessory Desired Clock Non-functional Behavior Abstract Due Clock Constraint Specification Language Automatic Code Generation Scheme Recent Past Today Embed-ded System Formal Description Significant Atten-tion Profile Marte Initial Implementation Formal Specification |
| Content Type | Text |
