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An analysis of the double-precision floating-point fft on fpgas.
| Content Provider | CiteSeerX |
|---|---|
| Author | Scott, K. Keith, Scott Hemmert Underwood, D. |
| Abstract | Advances in FPGA technology have led to dramatic improvements in double precision floating-point performance. Modern FPGAs boast several GigaFLOPs of raw computing power. Unfortunately, this computing power is distributed across 30 floating-point units with over 10 cycles of latency each. The user must find two orders of magnitude more parallelism than is typically exploited in a single microprocessor; thus, it is not clear that the computational power of FPGAs can be exploited across a wide range of algorithms. This paper explores three implementation alternatives for the Fast Fourier Transform (FFT) on FPGAs. The algorithms are compared in terms of sustained performance and memory requirements for various FFT sizes and FPGA sizes. The results indicate that FPGAs are competitive with microprocessors in terms of performance and that the "correct" FFT implementation varies based on the size of the transform and the size of the FPGA. |
| File Format | |
| Access Restriction | Open |
| Subject Keyword | Double-precision Floating-point Fft Fpga Size Modern Fpgas Several Gigaflops Floating-point Unit Computational Power Dramatic Improvement Single Microprocessor Double Precision Floating-point Performance Various Fft Size Fft Implementation Varies Wide Range Memory Requirement Sustained Performance Implementation Alternative Fpga Technology Fast Fourier Transform |
| Content Type | Text |
| Resource Type | Article |
