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Energy estimation for piecewise regular processor arrays (2002).
| Content Provider | CiteSeerX |
|---|---|
| Author | Hannig, Frank Teich, Jürgen |
| Abstract | In this paper, we present a first approach for array-level energy estimation during high-level synthesis when mapping piecewise regular algorithms onto massively parallel full size processor arrays. Innately, piecewise regular algorithms have some power consumption friendly properties, e.g., they may be mapped onto processor arrays with only local interconnect and memory. In addition to these properties, we show that the chosen mapping has a significant influence on the power consumption. Our energy |
| File Format | |
| Publisher Date | 2002-01-01 |
| Access Restriction | Open |
| Subject Keyword | Energy Estimation Piecewise Regular Processor Array Regular Algorithm First Approach Power Consumption Friendly Property Array-level Energy Estimation Power Consumption Parallel Full Size Processor Array Significant Influence Local Interconnect High-level Synthesis Processor Array Chosen Mapping |
| Content Type | Text |
