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A Boundary Element Method for Substrate Cross-talk Analysis (1995)
| Content Provider | CiteSeerX |
|---|---|
| Author | Smedes, T. |
| Description | Proceedings of the ProRISC/IEEE Workshop on Circuits, Systems and Signal Processing, Mierlo, the Netherlands, this issue An increasingly urgent topic for the realization of densely packed (mixed signal) integrated circuits is prevention of cross-talk via the substrate. Due to decreasing distances between components and increasing operating frequencies, the coupling between components and/or circuit blocks becomes stronger and affects the circuit behaviour more and more. This paper proposes a Boundary Element Method for calculating an admittance matrix for the substrate in order to analyze the parasitic coupling during layout verification. Some issues for the implementation in a layout extraction package, Space [3, 4], will be discussed. Finally, the paper will present relevant examples and comparison with results from the literature. 1 Introduction An increasingly urgent topic for the realization of densely packed (mixed signal) integrated circuits is prevention of cross-talk via the substrate. Due to decreasing distances between components and increasing operating frequencies, the coupling between comp... |
| File Format | |
| Language | English |
| Publisher Date | 1995-01-01 |
| Access Restriction | Open |
| Subject Keyword | Substrate Cross-talk Analysis Admittance Matrix Layout Extraction Package Boundary Element Method Layout Verification Mixed Signal Relevant Example Operating Frequency Urgent Topic Parasitic Coupling Circuit Block |
| Content Type | Text |
| Resource Type | Article |
