Loading...
Please wait, while we are loading the content...
Similar Documents
Exploiting Basic Block Value Locality with Block Reuse (1998)
| Content Provider | CiteSeerX |
|---|---|
| Author | Huang, Jian Lilja, David J. |
| Description | In Proceedings of the Fifth International Symposium on High-Performance Computer Architecture |
| Abstract | Value prediction at the instruction level has been introduced to allow more aggressive speculation and reuse than previous techniques. We investigate the input and output values of basic blocks and find that these values can be quite regular and predictable, suggesting that using compiler support to extend value prediction and reuse to a coarser granularity may have substantial performance benefits. For the SPEC benchmark programs evaluated, 90% of the basic blocks have fewer than 4 register inputs, 5 live register outputs, 4 memory inputs and 2 memory outputs. About 16% to 41% of all the basic blocks are simply repeating earlier calculations when the programs are compiled with the-O2 optimization level in the GCC compiler. We evaluate the potential benefit of basic block reuse using a novel mechanism called a block history buffer. This mechanism records input and live output values of basic blocks to provide value prediction and reuse at the basic block level. Simulation results show ... |
| File Format | |
| Publisher Date | 1998-01-01 |
| Access Restriction | Open |
| Subject Keyword | Basic Block Level Output Value Basic Block Gcc Compiler Value Prediction Novel Mechanism Substantial Performance Benefit Mechanism Record Input Block History Buffer Block Reuse Live Register Output Memory Output Basic Block Value Locality The-o2 Optimization Level Aggressive Speculation Memory Input Live Output Value Potential Benefit Simulation Result Instruction Level Spec Benchmark Program Coarser Granularity Basic Block Reuse Previous Technique Register Input |
| Content Type | Text |
| Resource Type | Proceeding Conference Proceedings |
