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Implementation lessons of performance prediction tool for parallel conservative simulation.
| Content Provider | CiteSeerX |
|---|---|
| Author | Lim, Chu-Cheow Low, Yoke-Hean Cai, Wentong Gan, Boon-Ping |
| Abstract | Performance prediction is a useful thing to do to help parallel programmers answer questions such as speedup scalability. To do performance prediction for parallel simulation, one first has to work out the performance analyzer algorithms for specific simulation protocols. This is only part of the work. In order for the prediction results to be close to what one gets from actual parallel executions, there are further considerations when implementing the analyzer. These include (a) equivalence of code between the sequential program and what might have been in an actual parallel program, and (b) system effects (e.g. cache miss rates and synchronization overheads in an actual parallel execution.) This paper describes our investigations into these issues for a discrete-event simulation program (for wafer fabrication models.) The performance analyzer tries to predict what the speedups will be, if a conservative, "super-step" (synchronous) simulation protocol is used. Because we also have an ... |
| File Format | |
| Access Restriction | Open |
| Subject Keyword | Parallel Conservative Simulation Implementation Lesson Performance Prediction Tool Performance Prediction Actual Parallel Execution Synchronization Overhead Discrete-event Simulation Program Wafer Fabrication Model Cache Miss Rate Parallel Simulation System Effect Performance Analyzer Try Sequential Program Performance Analyzer Algorithm Actual Parallel Program Simulation Protocol Speedup Scalability Useful Thing Specific Simulation Protocol Prediction Result |
| Content Type | Text |
| Resource Type | Article |