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Fast software-level power estimation for design space exploration.
| Content Provider | CiteSeerX |
|---|---|
| Author | Br, Carlo Fornaciari, William Salice, Fabio Sciuto, Donatella |
| Abstract | Aim of the proposed methodology is to perform design space exploration at a high-level of abstraction based on high-level estimations of different parameters. In particu-lar, this paper presents a methodology for static and dy-namic estimation of the power consumption of the soft-ware components. This analysis is based on a fast soft-ware compilation strategy that allows a fast re-targeting over different microprocessors. The paper focuses on the description of the overall power assessment flow and its application on an industrial application. 1. |
| File Format | |
| Access Restriction | Open |
| Subject Keyword | Design Space Exploration Software-level Power Estimation High-level Estimation Overall Power Assessment Flow Dy-namic Estimation Different Microprocessor Soft-ware Component Fast Re-targeting Power Consumption Industrial Application Different Parameter Fast Soft-ware Compilation Strategy |
| Content Type | Text |
| Resource Type | Article |