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A methodology and design environment for dsp asic fixed point refinement (1999).
| Content Provider | CiteSeerX |
|---|---|
| Author | Rijnders, Cmar |
| Abstract | Complex signal processing algorithms are specified in floating point precision. When their hardware implementation requires fixed point precision, type refinement is needed. The paper presents a methodology and design environment for this quantization process. The method uses independent strategies for fixing MSB and LSB weights of fixed point signals. It enables short design cycles by combining the strengths of both analytical and simulation based methods. 1 Introduction Modern signal processing ASICs, such as integrated cable modems and wireless multimedia terminals, are specified with algorithms in floating point precision. Often, the architectural style with which these algorithms are implemented is precision-limited, and relies on a fixed point representation. This requires a designer to translate floating point types into fixed point types, using a refinement strategy. For each refined floating point number, a fixed point characteristic (including fractional and integral wordle... |
| File Format | |
| Publisher Date | 1999-01-01 |
| Access Restriction | Open |
| Subject Keyword | Design Environment Dsp Asic Fixed Point Refinement Point Precision Point Type Lsb Weight Introduction Modern Signal Processing Asics Point Number Type Refinement Fixed Point Characteristic Fixed Point Signal Quantization Process Short Design Cycle Refinement Strategy Integrated Cable Modem Independent Strategy Complex Signal Processing Algorithm Hardware Implementation Integral Wordle Wireless Multimedia Terminal Fixed Point Representation Architectural Style |
| Content Type | Text |
