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Design of low update rate phase locked loops with application to carrier tracking in ofdm systems.
| Content Provider | CiteSeerX |
|---|---|
| Author | Raphaeli, Dan Yaniv, Oded |
| Abstract | Abstract: In this paper, we develop design procedures for car-rier tracking loop for orthogonal frequency division multiplexing (OFDM) systems or other systems of blocked data. In such commu-nication systems, phase error measurements are made infrequent enough to invalidate the traditional loop design methodology which is based on analog loop design. We analyze the degradation in the OFDM schemes caused by the tracking loop and show how the performance is dependent on the rms phase error, where we dis-tinguished between the effect of the variance in the average phase over the symbol and the effect of the phase change over the symbol. We derive the optimal tracking loop including optional delay in the loop caused by processing time. Our solution is general and in-cludes arbitrary phase noise and additive noise spectrums. In order to guarantee a well behaved solution, we have to check the design against margin constraints subject to uncertainties. In case the op-timal loop does not meet the required margin constraints subjected to uncertainties, it is shown how to apply a method taken from con-trol theory to find a controller. Alternatively, if we restrict the so-lution to first or second order loops, we give a simple loop design procedure which may be sufficient in many cases. Extensions of the method are shown for using both pilot symbols and data symbols in the OFDM receiver for phase tracking. We compare our results to other methods commonly used in OFDM receivers and we show that a large improvement can be gained. Index Terms: Carrier tracking, loop design, low rate digital PLL, orthogonal frequency division multiplexing (OFDM), phase locked loop (PLL), synchronization. I. |
| File Format | |
| Access Restriction | Open |
| Subject Keyword | Ofdm System Carrier Tracking Orthogonal Frequency Division Multiplexing Ofdm Receiver Tracking Loop Op-timal Loop Design Procedure Behaved Solution Optimal Tracking Loop Second Order Loop Traditional Loop Design Methodology Optional Delay Ofdm Scheme Commu-nication System Blocked Data Simple Loop Design Procedure In-cludes Arbitrary Phase Noise Required Margin Constraint Additive Noise Spectrum Phase Error Measurement Phase Tracking Pilot Symbol Analog Loop Design Margin Constraint Loop Design Car-rier Tracking Loop Many Case Phase Change Large Improvement Low Rate Digital Pll Con-trol Theory Data Symbol Index Term Average Phase |
| Content Type | Text |
| Resource Type | Article |
