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SRAM cell design for stability methodology
| Content Provider | CiteSeerX |
|---|---|
| Author | Wann, Clement Wong, Robert Frankt, David Mann, Y. Ko, Shang-Bin Cmce, Peter Lea, Dallas Hoyniak, Dennis Lee, Yoo-Mi Toomey, James Weybright, Mary Sudijono, John |
| Description | SRAM stability during word line disturb (access disturb) is becoming a key constraint for V,, scaling 111. Figure 1 illustrates the access disturb mechanism. In this paper we present a design methodology for $RAM stability during access disturb. In this methodology, the SRAM Access Disturb Margin (ADM) is defined as the ratio of the magnitude of the critical current to maintain SRAM stability ( I c ~ m) to the sigma of ICKIT. Using ADM as a figure of merit, this methodology enables one to project the cell stability margin due to process variations, e.g. V, variation, during design of a SRAM cell. Using statistical analysis, the required stability margin for an application requirement such as array size and available redundancy can be estimated. Direct cell probing and m a y test can be used to verify that the stability target is met. SRAM Stability Margin Parameter |
| File Format | |
| Language | English |
| Publisher Institution | in Proc. VLSI-TSA, 2005 |
| Access Restriction | Open |
| Subject Keyword | Sram Cell Available Redundancy Sram Access Disturb Margin Ram Stability Required Stability Margin Access Disturb Key Constraint Array Size Design Methodology Stability Target Access Disturb Mechanism Direct Cell Sram Stability Margin Parameter Sram Cell Design Cell Stability Margin Word Line Disturb Application Requirement Stability Methodology Sram Stability Statistical Analysis |
| Content Type | Text |
| Resource Type | Article |