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A 1.5-V 14-bit 100-MS/s self-calibrated DAC (2003)
| Content Provider | CiteSeerX |
|---|---|
| Author | Cong, Yonghua Geiger, All L. |
| Abstract | Abstract—Large-area current source arrays are widely used in current-steering digital-to-analog converters (DACs) to statis-tically maintain a required level of matching accuracy between the current sources. This not only results in large die size but also in significant degradation of dynamic range for high-frequency signals. To overcome technology barriers, relax requirements on the layout, and reduce DAC sensitivities to process, temperature, and aging, calibration is emerging as a viable solution for the next-generation high-performance DACs. In this paper, a new foreground calibration technique suitable for very-low-voltage environments is presented which effectively compensates for current source mismatch, and achieves high linearity with small die size and low power consumption. Settling and dynamic performance are also improved due to a dramatic reduction of parasitic effects. To demonstrate this technique, a 14-bit DAC prototype was implemented in a 0.13- m digital CMOS process. This is the first CMOS DAC reported that operates with a single 1.5-V power supply and achieves 14-bit linearity with less than 0.1 mm2 of active area. At 100 MS/s, the spurious free dynamic range is 82 dB (62 dB) for signals of 0.9 MHz (42 MHz) and the power consumption is only 16.7 mW. Index Terms—Calibration, CMOS, digital-to-analog converter (DAC), high linearity, low voltage, self-calibration. |
| File Format | |
| Journal | IEEE J. Solid-State Circuits |
| Language | English |
| Publisher Date | 2003-01-01 |
| Access Restriction | Open |
| Subject Keyword | 5-v 14-bit 100-ms Self-calibrated Dac High Linearity Dynamic Performance 14-bit Linearity High-frequency Signal New Foreground Calibration Technique Current Source Mismatch Index Term Calibration Relax Requirement Dramatic Reduction Small Die Size Digital Cmos Process 14-bit Dac Prototype Spurious Free Dynamic Range Abstract Large-area Current Source Array Dac Sensitivity Parasitic Effect Very-low-voltage Environment Low Power Consumption First Cmos Dac Current Source Active Area Dynamic Range Viable Solution Large Die Size Power Consumption Low Voltage 5-v Power Supply Current-steering Digital-to-analog Converter Significant Degradation Technology Barrier Digital-to-analog Converter Next-generation High-performance Dacs Required Level |
| Content Type | Text |
| Resource Type | Article |
