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Formalized methodology for data reuse exploration for low-power hierarchical memory mappings (1997).
| Content Provider | CiteSeerX |
|---|---|
| Author | Wuytack, S. Diguet, J. Ph. Catthoor, F. Man, H. De Diguet, S. Wuytack J. Ph. |
| Abstract | Efficient use of an optimized custom memory hierarchy to exploit temporal locality in the data accesses can have a very large impact on the power consumption in data dominated applications. In the past experiments have demonstrated that this task is crucial in a complete low-power memory management methodology. But effective formalized techniques to deal with this specific task have not been addressed yet. In this paper, the surprisingly large design freedom available for the basic problem is explored indepth and the outline of a systematic solution methodology is proposed. The efficiency of the methodology is illustrated on a real-life motion estimation application. The results obtained for this application show power reductions of about 85% for the memory sub-system compared to the case without a custom memory hierarchy. These large gains justify that data reuse and memory hierarchy decisions should be taken early in the design flow. Keywords--- Special-issue-lowpower97, system-leve... |
| File Format | |
| Publisher Date | 1997-01-01 |
| Access Restriction | Open |
| Subject Keyword | Low-power Hierarchical Memory Mapping Data Reuse Exploration Formalized Methodology Memory Management Methodology Temporal Locality Large Gain Application Show Power Reduction Large Design Freedom Data Reuse Optimized Custom Memory Hierarchy Memory Hierarchy Decision Keywords Special-issue-lowpower97 Real-life Motion Estimation Application Large Impact Specific Task Past Experiment Power Consumption Systematic Solution Methodology Basic Problem Memory Sub-system Design Flow Data Access Custom Memory Hierarchy Efficient Use |
| Content Type | Text |
