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Algorithm-based low-power vlsi architecture for 2-d mesh video-object motion tracking.
| Content Provider | CiteSeerX |
|---|---|
| Author | Badawy, Wael Bayoumi, Magdy |
| Abstract | Abstract—This paper presents an algorithm-based low-power VLSI architecture for video object (VO) motion tracking. The new architecture uses a novel hierarchical adaptive structured mesh topology. The structured mesh offers a significant reduction in the number of bits that describe the mesh topology. The motion of the mesh nodes represents the deformation of the VO. The motion com-pensation is performed using a multiplication-free algorithm for affine transformation, which significantly reduces the complexity of the decoder architecture. Moreover, pipelining the affine unit contributes a considerable savings of power. The VO motion-tracking architecture is based on a new algorithm for tracking a VO. It consists of two main parts: a video object motion-estimation unit (VOME) and a video object motion-compensation unit (VOMC). The VOME processes two consequent frames to generate a hierarchical adaptive structured mesh and the motion vectors of the mesh nodes. It implements parallel block matching motion-estimation units to optimize the latency. The VOMC processes a reference frame, mesh nodes, and motion vectors to predict a video frame. It implements parallel threads in which each thread implements a pipelined chain of scalable affine units. This motion-compensation algorithm allows the use of one simple warping unit to map a hierarchical structure. The affine unit warps the texture of a patch at any level of hierarchical mesh independently. The processor uses a memory serialization unit, which interfaces the memory to the parallel units. The architecture has been prototyped using top-down low-power design methodology. The performance analysis shows that this pro-cessor can be used in online object-based video applications such as in MPEG-4 and VRML. Index Terms—Affine transformation, low bit-rate, low power, mesh-based motion tracking, motion compensation, motion esti-mation, motion tracking, video architecture, video object. I. |
| File Format | |
| Access Restriction | Open |
| Subject Keyword | Algorithm-based Low-power Vlsi Architecture Mesh Node 2-d Mesh Video-object Motion Tracking Mesh Topology Motion Vector Video Object Affine Unit Motion Compensation Considerable Saving Motion Tracking Low Bit-rate Scalable Affine Unit Performance Analysis Affine Transformation Video Architecture Reference Frame Structured Mesh Motion Com-pensation New Architecture Memory Serialization Unit Motion-estimation Unit Hierarchical Mesh Vo Motion-tracking Architecture Top-down Low-power Design Methodology Video Object Motion-estimation Unit Motion Esti-mation Parallel Block Pipelined Chain Significant Reduction Low Power Video Object Motion-compensation Unit Main Part Consequent Frame Novel Hierarchical Adaptive Index Term Affine Transformation Parallel Thread Decoder Architecture New Algorithm Hierarchical Structure Motion-compensation Algorithm Online Object-based Video Application Multiplication-free Algorithm Parallel Unit Mesh-based Motion Tracking Hierarchical Adaptive Video Frame |
| Content Type | Text |
