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Efficient Computations on fault-prone BSP machines (1997)
| Content Provider | CiteSeerX |
|---|---|
| Author | Kontogiannis, Spyros C. Pantziou, Grammati E. Spirakis, Paul C. |
| Description | In Proc. of the 9th ACM Symposium on Parallel Algorithms and Architectures |
| Abstract | In this paper general simulations of algorithms designed for fully operational BSP machines on BSP machines with faulty or unavailable processors, are developed. The fail-stop model is considered for the fault occurrences, that is, if a processor fails or becomes unavailable, it remains so until the end of the computation. The faults are random, in the sense that a processor may fail independently with probability at most a, where a is a constant. Two possible settings for fault occurrences are considered: the static case where the faults are static (the faulty or unavailable processors are already known at the beginning of the computation), and the dynamic case where the processors may become faulty or unavailable during the computation. In the case of static faults, a simulation of an n-processor fault-free BSP machine on a faulty n-processor BSP machine is presented with constant slowdown per local computation step and O(log n \Delta maxfL; gg) slowdown per communication step, gi... |
| File Format | |
| Publisher Date | 1997-01-01 |
| Access Restriction | Open |
| Subject Keyword | Local Computation Step Delta Maxfl Unavailable Processor Fault Occurrence Static Case Static Fault Fail-stop Model Fault-prone Bsp Machine Paper General Simulation Communication Step Constant Slowdown N-processor Fault-free Bsp Machine Bsp Machine Faulty N-processor Bsp Machine Possible Setting Operational Bsp Machine Dynamic Case Efficient Computation |
| Content Type | Text |
| Resource Type | Conference Proceedings Article |
