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L FULL CUSTOM VLSI IMPLEMENTATION OF HIGH-SPEED
| Content Provider | CiteSeerX |
|---|---|
| Author | Liu, I. . J. Ray Srinivasant, Vishnu |
| Abstract | In this paper we present a full-custom VLSI design of highspeed 2-D DCT/IDCT processor based on the new class of time-recursive algorithms and architectures which has never been implemented to demonstrate its performance. We show that the VLSI implementation of this class of DCT/IDCT algorithms can easily meet the high-speed requirements of HDTV due to its modularity, regularity, local connectivity, and scalability. Our design of the 8 x 8 DCT/IDCT can operate at 50 MHz with a 400 Mbps throughput based on a very conservative estimate under 1.2 ~ CMOS technology. 1. |
| File Format | |
| Access Restriction | Open |
| Subject Keyword | Vlsi Implementation Time-recursive Algorithm Highspeed 2-d Dct Idct Processor High-speed Requirement Full-custom Vlsi Design Cmos Technology Dct Idct Full Custom Vlsi Implementation Conservative Estimate Mbps Throughput Dct Idct Algorithm Local Connectivity |
| Content Type | Text |
| Resource Type | Article |
