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On mismatch in the deep sub-micron era- from physics to circuits.
| Content Provider | CiteSeerX |
|---|---|
| Abstract | Abstract — Rapid decrease in feature sizes has increasingly accentuated the importance of matching between transistors. Deep sub-micron designs will further emphasize the need to focus on the effects of mismatch. Furthermore, increased efforts on high level analog device modeling will necessitate accompanying mismatch simulation and measurement methods. The deep sub-micron era forces circuit designers to learn more about the physics and the technology of transistors. This study introduces a method and assists circuit designers in including this method in their traditional design flow of circuits. By proposing a solution to the problem of building a modeling bridge between transistor mismatch and circuit response to it, we hope to enable designers to incorporate low level mismatch information in their higher level design. I. |
| File Format | |
| Access Restriction | Open |
| Subject Keyword | Deep Sub-micron Era High Level Analog Device Modeling Assist Circuit Designer Low Level Mismatch Information Measurement Method Circuit Response Modeling Bridge Transistor Mismatch Mismatch Simulation Deep Sub-micron Design Feature Size Traditional Design Flow Level Design Abstract Rapid Decrease |
| Content Type | Text |
