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Getable compilers; code generation;.
| Content Provider | CiteSeerX |
|---|---|
| Author | Brandner, Florian Ebner, Dietmar Krall, Andreas |
| Description | This content is published in/by Technischen Universität Wien |
| Abstract | With increasing complexity of modern embedded systems, the availability of highly optimizing compilers becomes more and more important. At the same time, application specific instruction-set processors (ASIPs) are used to fine-tune hardware platforms to the intended application, demanding the availability of retargetable components throughout the whole tool chain. A very promising approach is to model the target architecture using a dedicated description language that is rich enough to generate hardware components and the required tool chain, e.g., assembler, linker, simulator, and compiler. In this work we present a new structural architecture description language (ADL) that is used to derive the architecture dependent components of a compiler backend — most notably an instruction selector based on tree pattern matching. We combine our backend with gcc, therebyopeningup the way for a large number of readily available high level optimizations. Experimental results show that the automatically derived code generator is competitive in comparison to a handcrafted compiler backend. |
| File Format | |
| Access Restriction | Open |
| Subject Keyword | Getable Compiler Code Generation Compiler Backend Hardware Component Fine-tune Hardware Platform Dedicated Description Language Available High Level Optimization Code Generator Whole Tool Chain Promising Approach Required Tool Chain Instruction Selector Large Number Application Specific Instruction-set Processor Architecture Dependent Component Experimental Result Target Architecture New Structural Architecture Description Language Tree Pattern Retargetable Component |
| Content Type | Text |
