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A simple mosfet model of an artificial synapse.
| Content Provider | CiteSeerX |
|---|---|
| Author | Milev, Momchil Mihaylov Blvd, St. Kliment Ohridsky |
| Abstract | Abstract: A simple analog-signal synapse model is developed and afterward implemented on a standard 0.35µm CMOS process to provide for large scale of integration, high processing speed and manufacturability of a multi-layer artificial neural network. Synapse non-linearity with respect to synapse weight is studied. Demonstrated is the capability of the circuit to operate in both feed-forward and learning (training) mode. The effect of the synapse’s inherent quadratic nonlinearity on learning convergence and on the optimization of weight vector update direction is analyzed and found to be beneficial. The suitability of the proposed implementation for very large-scale artificial neural networks is confirmed. Key-Words: Artificial neural networks (ANNs), analog implementation, Very Large Scale of Integration (VLSI), nonlinear synapse, synapse with nonlinearity. 1 |
| File Format | |
| Access Restriction | Open |
| Subject Keyword | Artificial Synapse Simple Mosfet Model Large Scale Cmos Process High Processing Speed Large-scale Artificial Neural Network Weight Vector Update Direction Multi-layer Artificial Neural Network Nonlinear Synapse Synapse Non-linearity Analog Implementation Synapse Inherent Quadratic Nonlinearity Artificial Neural Network Simple Analog-signal Synapse Model |
| Content Type | Text |
| Resource Type | Article |
