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Regular Analog/RF Integrated Circuits Design Using Optimization With Recourse Including Ellipsoidal Uncertainty (2009)
| Content Provider | CiteSeerX |
|---|---|
| Author | Xu, Yang Hsiung, Kan-Lin Li, Xin Pileggi, Lawrence T. Boyd, Stephen P. |
| Abstract | Abstract—Long design cycles due to the inability to predict silicon realities are a well-known problem that plagues analog/RF integrated circuit product development. As this problem worsens for nanoscale IC technologies, the high cost of design and multiple manufacturing spins causes fewer products to have the volume required to support full-custom implementation. Design reuse and analog synthesis make analog/RF design more affordable; however, the increasing process variability and lack of modeling accuracy remain extremely challenging for nanoscale analog/RF design. We propose a regular analog/RF IC using metal-mask configurability design methodology Optimization with Recourse of Analog Circuits including Layout Extraction (ORACLE), which is a combination of reuse and shared-use by formulating the synthesis problem as an optimization with recourse problem. Using a two-stage geometric programming with recourse approach, ORACLE solves for both the globally optimal shared and application-specific variables. Furthermore, robust optimization is proposed to treat the design with variability problem, further enhancing the ORACLE methodology by providing yield bound for each configuration of regular designs. The statistical variations of the process parameters are captured by a confidence ellipsoid. We demonstrate ORACLE for regular Low Noise Amplifier designs using metal-mask configurability, where a range of applications share common underlying structure and application-specific customization is performed using the metal-mask layers. Two RF oscillator design examples are shown to achieve robust designs with guaranteed yield bound. Index Terms—Configurable design, optimization with recourse, robustness, statistical optimization. I. |
| File Format | |
| Journal | IEEE Trans. Comput.-Aided Design Integr. Circuits Syst |
| Language | English |
| Publisher Date | 2009-01-01 |
| Access Restriction | Open |
| Subject Keyword | Recourse Including Ellipsoidal Uncertainty Variability Problem Regular Low Noise Amplifier Application-specific Customization Analog Circuit Circuit Product Development Guaranteed Yield Bound Layout Extraction Robust Optimization Application Share Common Underlying Structure Yield Bound Full-custom Implementation Metal-mask Layer Analog Rf Design Statistical Variation Process Parameter Analog Rf Process Variability Statistical Optimization Nanoscale Ic Technology Abstract Long Design Cycle Two-stage Geometric Programming Synthesis Problem Regular Design Recourse Approach Multiple Manufacturing Spin Recourse Problem Design Reuse Regular Analog Rf Ic Index Term Configurable Design Metal-mask Configurability Robust Design Nanoscale Analog Rf Design Silicon Reality Well-known Problem Confidence Ellipsoid Application-specific Variable Rf Oscillator Design Example Metal-mask Configurability Design Methodology Optimization High Cost Oracle Methodology Analog Synthesis |
| Content Type | Text |
| Resource Type | Article |
