Loading...
Please wait, while we are loading the content...
Similar Documents
Compiler-directed leakage reduction in embedded microprocessors.
| Content Provider | CiteSeerX |
|---|---|
| Author | Roy, Soumyaroop Ranganathan, Nagarajan Katkoori, Srinivas |
| Abstract | Abstract — Compiler-directed power gating is an approach in which sleep instructions are inserted appropriately at compile time into the application code to selectively deactivate the functional units in microprocessors during their idle periods to reduce power dissipation due to leakage. Although the effect of code transformations on dynamic and system power has been investigated and reported in the literature, such a study is lacking in the context of power gating. In this paper, we investigate and report how the leakage savings in both integer and floating point units can be improved using machine-dependent and independent optimizations in a compiler-directed power gating framework. In our study, it is ensured that power gating is applied only when the leakage savings are considerably more than the various overheads incurred in its implementation. The target embedded processor is modeled on the ARMv4 architecture, which is modified to support the power gating of its arithmetic functional units. For experimentation, GCC is used as the compiler infrastructure and Simplescalar-ARM is used as the detailed architectural simulator for reporting power and performance metrics for embedded applications belonging to the MiBench and MediaBench benchmark suites. Experimental results suggest that the additional savings in leakage energy due to one or more of the optimizations may vary largely depending on the benchmark. Moreover, the overhead of sleep instructions can be reduced by up to 50 times by performing procedure inlining. I. |
| File Format | |
| Access Restriction | Open |
| Subject Keyword | Compiler-directed Leakage Reduction Power Gating Embedded Microprocessor Leakage Saving Sleep Instruction Performance Metric Procedure Inlining Various Overhead Idle Period Additional Saving Detailed Architectural Simulator Application Code Power Dissipation Point Unit Abstract Compiler-directed Power Gating Compiler Infrastructure Compile Time Embedded Application System Power Leakage Energy Armv4 Architecture Code Transformation Independent Optimization Arithmetic Functional Unit Functional Unit Mediabench Benchmark Suite Compiler-directed Power Experimental Result |
| Content Type | Text |