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Compile Time Instruction Cache Optimizations (1994)
| Content Provider | CiteSeerX |
|---|---|
| Author | Shlomit, Abraham Mendlson Pinter, Shlomit S. Shtokhamer, Ruth |
| Abstract | This paper presents a new approach for improving performance of instruction cache based systems. The idea is to prevent cache misses caused when different segments of code, which are executed in the same loop, are mapped onto the same cache area. The new approach uses static information only and does not rely on any special hardware mechanisms such as support of non-cachable addresses. The technique can be applied at compile time or as part of object modules optimization. The technique is based on replication of code together with algorithms for code placement. We introduce the notion of abstract caches and present simulation results of the new technique. The results show that in certain cases, the number of cache misses is reduced by two orders of magnitude. 1 Introduction As the speed of a processor increases, the penalties for cache misses become more severe. In order to improve performance, modern computers use a fast clock rate, long pipelines and cache memories, but th... |
| File Format | |
| Volume Number | 22 |
| Journal | Computer Architecture News |
| Language | English |
| Publisher Date | 1994-01-01 |
| Access Restriction | Open |
| Subject Keyword | Compile Time Instruction Cache Optimization Cache Miss New Approach New Technique Non-cachable Address Fast Clock Rate Compile Time Long Pipeline Static Information Modern Computer Abstract Cache Cache Memory Cache Area Different Segment Object Module Optimization Code Placement Special Hardware Mechanism Present Simulation Result Certain Case Processor Increase Instruction Cache |
| Content Type | Text |
| Resource Type | Article |
