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Scheduling to reduce memory coherence overhead on coarse-grain multiprocessors (1995).
| Content Provider | CiteSeerX |
|---|---|
| Author | Connelly, Christopher Ellis, Carla Schlatter |
| Abstract | Some Distributed Shared Memory (DSM) and Cache-Only Memory Architecture (COMA) multiprocessors keep processes near the data they reference by transparently replicating remote data in the processes' local memories. This automatic replication of data can impose substantial memory system overhead on an application since all replicated data must be kept coherent. We examine the effect of task scheduling on data replication and memory system overhead due to coherency requirements. We show that simple policies using programmer hints can reduce memory coherence overhead in our workload applications. 1 Introduction Recent work has shown that the efficiency of shared memory, NUMA (NonUniform Memory Access) multiprocessors can be improved considerably by keeping threads and data near each other. This can be accomplished by one of several mechanisms: the OS can migrate or replicate an application's data pages [4, 5, 11, 12]; the OS or user-level thread scheduler may attempt to schedule threads o... |
| File Format | |
| Publisher Date | 1995-01-01 |
| Access Restriction | Open |
| Subject Keyword | Reduce Memory Coherence Overhead Coarse-grain Multiprocessor Introduction Recent Work Local Memory Nonuniform Memory Access Memory System Distributed Shared Memory Data Page User-level Thread Scheduler Memory Coherence Overhead Shared Memory Simple Policy Data Replication Automatic Replication Cache-only Memory Architecture Substantial Memory System Several Mechanism Programmer Hint Remote Data Coherency Requirement Workload Application |
| Content Type | Text |
