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Behavioral simulation of delta-sigma fractional-n pll for wimax applications.
| Content Provider | CiteSeerX |
|---|---|
| Author | Kit, Gan Leong Yee, Kong Chooi Ahmed, Syed Khaleel Hamid, Fazrena Azlee |
| Description | This content is published in/by Universiti Tenaga Nasional |
| Abstract | Abstract — Frequency synthesizer’s behavior affects the wireless communication system. The quality of the frequency synthesizer is highly dependent on the type of Phase Locked-Loop (PLL) used for the system. It is crucial for the designers determine the correct type of PLL to achieve high noise performance, high switching speed, and high resolution in the wireless communication system. In this paper, several PLLbased frequency synthesizers are reviewed, including the design options and associated trade-offs. This paper presents the design and simulation results of a proposed ∑-∆ fractional-N PLL based frequency synthesizer for the Mobile WiMAX standard. Design requirements in terms of phase noise, settling time, frequency resolution and frequency of operation are presented. The behavioral simulation results using CppSim program (C++ simulator) show settling time about 17µs and the integrated phase noise is less than 1 °rms |
| File Format | |
| Access Restriction | Open |
| Subject Keyword | Delta-sigma Fractional-n Pll Wimax Application Behavioral Simulation Frequency Synthesizer Wireless Communication System High Resolution Abstract Frequency Synthesizer Behavior Cppsim Program Mobile Wimax Standard Design Requirement Design Option Phase Noise Correct Type Frequency Resolution Show Settling Time Fractional-n Pll Behavioral Simulation Result Simulation Result Phase Locked-loop Integrated Phase Noise High Noise Performance |
| Content Type | Text |
| Resource Type | Article |
